Until recently, the cathode ray tube ("CRT") has been the primary device for displaying information. While having sufficient display characteristics with respect to color, brightness, contrast, and resolution, CRTs are relatively bulky and power hungry. In view of the advent of portable laptop computers, the demand has intensified for a display technology which is lightweight, compact, and power efficient.
One available technology is flat panel displays, and more particularly, Liquid Crystal Display ("LCD") devices. LCDs are currently used for laptop computers. However, these LCD devices provide poor contrast in comparison to CRT technology. Further, LCDs offer only a limited angular display range. Moreover, color LCD devices consume power at rates incompatible with extended battery operation. In addition, a color LCD type screen tends to be far more costly than an equivalent CRT.
In light of these shortcomings, there have been several developments recently in thin film, Field Emission Display ("FED") technology. In U.S. Pat. No. 5,210,472, commonly assigned with the present invention, a FED design is disclosed which utilizes a matrix addressable array of pointed, thin-film, cold field emission cathodes in combination with a phosphor luminescent screen. Here, the FED incorporates a column signal to activate a column switching driver and a row signal to activate a row switching driver. At the intersection of both an activated column and an activated row, a grid-to-emitter voltage differential exists sufficient to induce a field emission, thereby causing illumination of the associated phosphor of a pixel on the phosphorescent screen. By employing this design, the bus line associated with the current regulator has a low parasitic capacitance, thus being easier to control. Extensive research has recently made the manufacture of an inexpensive, low power, high resolution, high contrast, full color FED a more feasible alternative to LCDs.
However, the structure disclosed in U.S. Pat. No. 5,210,472, has several shortcomings. First, that architecture requires a large amount of semiconductor die space because each pixelator comprises a row select switch, a column select switch, and a constant current source within the display's array. As such, the size of the display, the packed pixel density (pixels per inch), and thus the resolution are all adversely affected. Further, that architecture effects the size of the display. By requiring a greater number of transistors, that architecture adversely affected the number of die per wafer, as well as the manufacturing yield.
Second, the architecture of U.S. Pat. No. 5,210,472 does not provide direction for a more flexible, powerful and reliable constant current source. That design does not enable a method for reducing power consumption of the overall device.
Thus, a flat panel display architecture is needed that allows for a more compact design, requires fewer transistors, and has a more flexible, powerful, and reliable constant current source, while requiring less power consumption. Moreover, an architecture is needed which can support better color and gray scale control. Further, there is a demand for a flat panel display having a more compact design. Additionally, there is a demand for a flat panel display architecture that provides a larger number of die per wafer and higher manufacturing yield, while having a reduced cost associated with its manufacture.